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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9230985 B1

PDFFull Text
Date of Patent:
Jan. 05, 2016

Filed:

Oct. 15, 2014

Vertical tft with tunnel barrier

Applicant:

Sandisk 3d Llc, Milpitas, CA (US);

Inventors:

Ming-Che Wu, San Jose, CA (US);

Peter Rabkin, Cupertino, CA (US);

Tim Chen, Santa Clara, CA (US);

Assignee:

SanDisk 3D LLC, Milpitas, CA (US);

Attorney:

Vierra Magen Marcus LLP

Primary Examiner:

Daniel Shook

Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 27/115 (2006.01); H01L 29/786 (2006.01); H01L 29/08 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 21/02164 (2013.01); H01L 21/02181 (2013.01); H01L 21/02532 (2013.01); H01L 27/1157 (2013.01); H01L 27/11573 (2013.01); H01L 29/0847 (2013.01); H01L 29/66666 (2013.01); H01L 29/66742 (2013.01); H01L 29/78642 (2013.01);
Abstract

A vertically oriented thin film transistor (TFT) having a tunnel barrier is disclosed. The tunnel barrier may be formed from a dielectric such as silicon oxide or hafnium oxide. The vertically oriented TFT selection device with tunnel barrier may serve as a selection device in a 3D memory array. The vertically oriented TFT may be used to connect/disconnect a global bit line to/from a vertical bit line in a 3D memory array. The vertically oriented TFT may be used to connect/disconnect a source line to/from a channel of a vertical NAND string in a 3D memory array. A vertical TFT with tunnel barrier has a high breakdown voltage, low leakage current, and high on current. The tunnel barrier can be at the top junction or bottom junction of the TFT.

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