The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 05, 2016

Filed:

Oct. 12, 2012
Applicant:

Koninklijke Philips N.v., Eindhoven, NL;

Inventors:

Ronald Dekker, Valkenswaard, NL;

Marcelis Bout, Noord-Brabant, NL;

Marcel Mulder, Eindhoven, NL;

Ruediger Mauczok, Erkelenz, DE;

Assignee:

Koninklijke Philips N.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 23/48 (2006.01); B06B 1/02 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5226 (2013.01); B06B 1/0292 (2013.01); H01L 21/76898 (2013.01); H01L 23/481 (2013.01); H01L 23/53271 (2013.01); H01L 2224/02372 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05548 (2013.01); H01L 2224/131 (2013.01); H01L 2224/13024 (2013.01); H01L 2224/16145 (2013.01); H01L 2924/1461 (2013.01);
Abstract

The present invention relates to a through-wafer via device () comprising a wafer () made of a wafer material and having a first wafer surface () and a second wafer surface () opposing the first wafer surface (). The through-wafer via device () further comprises a plurality of side by side first trenches () provided with a conductive material and extending from the first wafer surface () into the wafer () such that a plurality of spacers () of the wafer material are formed between the first trenches (). The through-wafer via device () further comprises a second trench () provided with the conductive material and extending from the second wafer surface () into the wafer (), the second trench () being connected to the first trenches (). The through-wafer via device () further comprises a conductive layer () made of the conductive material and formed on the side of the first wafer surface (), the conductive material filling the first trenches () such that the first conductive layer () has a substantially planar and closed surface.


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