The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 05, 2016
Filed:
Oct. 22, 2014
Applicant:
Synopsys, Inc., Mountain View, CA (US);
Inventors:
Yanyi Liu Wong, Bellevue, WA (US);
Agustinus Sutandi, Issaquah, WA (US);
Assignee:
Synopsys, Inc., Mountain View, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G11C 16/26 (2006.01); G11C 16/24 (2006.01); G11C 16/10 (2006.01); G11C 16/12 (2006.01); G11C 16/30 (2006.01); G11C 16/08 (2006.01); G11C 7/18 (2006.01);
U.S. Cl.
CPC ...
G11C 16/26 (2013.01); G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/10 (2013.01); G11C 16/12 (2013.01); G11C 16/24 (2013.01); G11C 16/30 (2013.01); G11C 7/18 (2013.01);
Abstract
A memory system with improved power consumption and operation speed. A memory system performs a data read operation in a low power read mode to improve operation speed and reduce power consumption by biasing bit cells in the memory system at a negative voltage. The use of the negative voltage minimizes changing of voltages of the bit cells. Additionally, the memory system performs data read operation in a margin read mode to improve accuracy of the reading by biasing the bit cells at a positive voltage.