The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 29, 2015

Filed:

Sep. 24, 2014
Applicant:

SK Hynix Inc., Gyeonggi-do, KR;

Inventors:

Nam Yoon Kim, Chungcheongbuk-do, KR;

Sung Kun Park, Chungcheongbuk-do, KR;

Assignee:

SK Hynix Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 27/108 (2006.01); H01L 29/788 (2006.01); H01L 27/12 (2006.01); H01L 27/115 (2006.01); H01L 49/02 (2006.01); H01L 27/06 (2006.01); H01L 29/06 (2006.01); H01L 29/861 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11524 (2013.01); H01L 23/528 (2013.01); H01L 27/0629 (2013.01); H01L 28/40 (2013.01); H01L 29/0642 (2013.01); H01L 29/861 (2013.01);
Abstract

A nonvolatile memory device includes a first active region and a second active region separated from each other; a floating gate crossing the first active region, and disposed such that an end thereof overlaps with the second active region; a selection gate crossing the first active region, and disposed side by side with and coupled to the floating gate; a dielectric layer disposed between the floating gate and the selection gate, wherein a stack of the dielectric layer, the floating gate and the selection gate forms a first capacitor in a horizontal structure; a well region disposed in the second active region and coupled to the floating gate, wherein a stack of the well region and the floating gate forms a second capacitor in a vertical structure; and a contact commonly coupled to the well region and the selection gate.


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Kim, Nam. (2015). Nonvolatile memory device (U.S. Patent No. 9224743). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9224743

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