The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 29, 2015

Filed:

Oct. 07, 2013
Applicant:

Virident Systems Inc., Milpitas, CA (US);

Inventors:

Vijay Karamcheti, Los Altos, CA (US);

Kenneth A. Okin, Saratoga, CA (US);

Kumar Ganapathy, Los Altos, CA (US);

Ashish Singhai, Cupertino, CA (US);

Rajesh Parekh, Los Altos, CA (US);

Assignee:

Virident Systems Inc., Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 12/10 (2006.01); G06F 9/50 (2006.01); G06F 12/08 (2006.01); G06F 12/12 (2006.01); G06F 3/06 (2006.01); G06F 12/14 (2006.01); G06F 13/16 (2006.01);
U.S. Cl.
CPC ...
G06F 12/10 (2013.01); G06F 3/068 (2013.01); G06F 3/0685 (2013.01); G06F 9/5016 (2013.01); G06F 12/08 (2013.01); G06F 12/121 (2013.01); G06F 3/0628 (2013.01); G06F 3/0638 (2013.01); G06F 12/1009 (2013.01); G06F 12/1475 (2013.01); G06F 13/1694 (2013.01); G06F 2212/205 (2013.01); G06F 2212/657 (2013.01); Y02B 60/1225 (2013.01); Y02B 60/142 (2013.01);
Abstract

Data stored within symmetric and asymmetric memory components of main memory is integrated by identifying a first data as having access characteristics suitable for storing in an asymmetric memory component. The first data is included among a collection of data to be written to the asymmetric memory component. An amount of data is identified within the collection of data to be written to the asymmetric memory component. The amount of data is compared within the collection of data to a volume threshold to determine whether a block write to the asymmetric memory component is justified by the amount of data. If justified, the collection of data is loaded to the asymmetric memory component.


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