The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 29, 2015
Filed:
Mar. 05, 2015
Macau University of Science and Technology, Macau, MO;
Macau University of Science and Technology, Macau, MO;
Abstract
In semiconductor manufacturing, there are wafer fabrication processes in cluster tools that need a wafer to visit some processing steps for more than once, leading to a revisiting process. Also, wafers may be subject to wafer residency time constraints. By considering atomic layer deposition (ALD) as a typical wafer revisiting process, this invention studies the challenging scheduling problem of single-arm cluster tools for the ALD process with wafer residency time constraints. By recognizing that the key to this problem is to schedule the robot tasks, the present invention presents different robot task sequencing strategies. With these strategies for different cases, the present invention performs the schedulability analysis and derives the schedulability conditions for such tools for the first time. If schedulable, the present invention proposes scheduling algorithms to obtain an optimal schedule efficiently. Illustrative examples are given to show the application of the proposed concepts and approach.