The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 29, 2015
Filed:
Nov. 08, 2012
Fuji Electric Co., Ltd., Kawasaki-shi, JP;
Katsunori Suzuki, Matsumoto, JP;
Akihiko Ohi, Matsumoto, JP;
Shoji Kitamura, Matsumoto, JP;
Takahiro Ooyama, Matsumoto, JP;
FUJI ELECTRIC CO., LTD., , JP;
Abstract
A fault position analysis method and a fault position analysis device for a semiconductor device, through which a fault position of a SiC semiconductor device can be analyzed and specified by an OBIRCH method, are disclosed. The fault position analysis method for the semiconductor device scans and irradiates a device and a circuit on a front surface of a substrate with a laser beam from a rear surface side of the substrate of the semiconductor device to heat the device and the circuit. It causes a current to flow to the device and the circuit while being heated, detects a change in a resistance value caused by a change in a current, and analyzes the fault position. The semiconductor device is a semiconductor device which uses an N-doped SiC substrate. Laser beams having wavelengths of 650 to 810 nm are used.