Method of manufacturing semiconductor device with offset sidewall structure

Abstract

A method of manufacturing a semiconductor device with NMOS and PMOS transistors is provided. The semiconductor device can lessen a short channel effect, can reduce gate-drain current leakage, and can reduce parasitic capacitance due to gate overlaps, thereby inhibiting a reduction in the operating speed of circuits. An N-type impurity such as arsenic is ion implanted to a relatively low concentration in the surface of a silicon substrate () in a low-voltage NMOS region (LNR) thereby to form extension layers (). Then, a silicon oxide film (OX) is formed to cover the whole surface of the silicon substrate (). The silicon oxide film (OX) on the side surfaces of gate electrodes (-) is used as an offset sidewall. Then, boron is ion implanted to a relatively low concentration in the surface of the silicon substrate () in a low-voltage PMOS region (LPR) thereby to form P-type impurity layers () later to be extension layers ().