The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 15, 2015

Filed:

Aug. 11, 2014
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Federico Tiziani, Muggio, IT;

Giovanni Campardo, Bergamo, IT;

Massimo Iaculo, San Marco Evangelista, IT;

Claudio Giaccio, Torre del Greco, IT;

Manuela Scognamiglio, Burago Molgora, IT;

Danilo Caraccio, Buonalbergo, IT;

Ornella Vitale, Cicciano, IT;

Antonino Pollio, Vico Equense, IT;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G06F 11/10 (2006.01); G06F 13/16 (2006.01); G06F 1/32 (2006.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1072 (2013.01); G06F 1/3275 (2013.01); G06F 11/10 (2013.01); G06F 12/0246 (2013.01); G06F 13/1668 (2013.01); Y02B 60/1228 (2013.01);
Abstract

In various embodiments, a single virtualized error correcting code (ECC) NAND controller executes an ECC algorithm and manages a stack of NAND flash memories. The virtualized ECC NAND controller allows the host processor to drive the stack of flash memory devices as a single NAND chip while the controller redirects the data to the selected NAND memory device in the stack. In various embodiments, a controller manages a plurality of NAND memory devices. The controller provides power to a select one of the plurality of NAND memory devices at a time to conserve overall power consumption of the storage system.


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