The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 08, 2015

Filed:

Mar. 08, 2013
Applicant:

Triquint Semiconductor, Inc., Hillsboro, OR (US);

Inventors:

Suzanne Combe, Longwood, FL (US);

Kurt Steiner, Orlando, FL (US);

Alan S. Chen, Windermere, FL (US);

Charles E. Carpenter, Orlando, FL (US);

Ian Yee, Austin, TX (US);

Jean Briot, Apopka, FL (US);

George Grama, Orcutt, CA (US);

Assignee:

TriQuint Semiconductor, Inc., Hillsboro, OR (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03H 9/25 (2006.01); H01L 41/047 (2006.01); H03H 3/08 (2006.01); H03H 9/10 (2006.01); H03H 9/05 (2006.01);
U.S. Cl.
CPC ...
H01L 41/047 (2013.01); H03H 3/08 (2013.01); H03H 9/1071 (2013.01); H03H 9/0547 (2013.01);
Abstract

Embodiments described herein may provide an acoustic wave device, a method of fabricating an acoustic wave device, and a system incorporating an acoustic wave device. The acoustic wave device may include a transducer disposed on a substrate, with a contact coupled with the transducer. The acoustic wave device may further include a wall layer and cap that define an enclosed opening around the transducer. A via may be disposed through the cap and wall layer over the contact, and a top metal may be disposed in the via. The top metal may form a pillar in the via and a pad on the cap above the via. The pillar may provide an electrical connection between the pad and the contact. In some embodiments, the acoustic wave device may be formed as a wafer-level package on a substrate wafer.


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