The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 08, 2015

Filed:

May. 09, 2012
Applicants:

Harinarayanan Seshadri, Bangalore, IN;

Rajeev Muralidhar, Bangalore, IN;

Vishwesh M. Rudramuni, Bangalore, IN;

Illyas Mansoor, Bangalore, IN;

Inventors:

Harinarayanan Seshadri, Bangalore, IN;

Rajeev Muralidhar, Bangalore, IN;

Vishwesh M. Rudramuni, Bangalore, IN;

Illyas Mansoor, Bangalore, IN;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/00 (2006.01); G06F 1/32 (2006.01); G06F 9/50 (2006.01); G06F 1/20 (2006.01);
U.S. Cl.
CPC ...
G06F 9/5094 (2013.01); G06F 1/206 (2013.01); G06F 1/324 (2013.01); G06F 1/3206 (2013.01); G06F 1/3287 (2013.01); G06F 1/3296 (2013.01); G06F 9/00 (2013.01); Y02B 60/1217 (2013.01); Y02B 60/1275 (2013.01); Y02B 60/1282 (2013.01); Y02B 60/142 (2013.01); Y02B 60/144 (2013.01);
Abstract

Embodiments of apparatus, computer-implemented methods, computing devices, systems, and computer-readable media (transitory and non-transitory) are described herein for scheduling a plurality of tasks among a plurality of processor cores. A first processor core of a plurality of processor cores of a computing device may be transitioned to a shielded state, in which no new tasks are to be assigned to the first processor core and tasks already assigned to the first processor core are executed to completion, in response to a determination that a criterion has been met. In various embodiments, the criterion may be based on a condition of the computing device, such as power available to the computing device or a temperature associated with the computing device. In various embodiments, the first processor core may transition to a reduced-power state after the tasks already assigned to the first processor core execute completion.


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