The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 01, 2015
Filed:
May. 15, 2014
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Inventors:
Chi-Lin Liu, New Taipei, TW;
Shang-Chih Hsieh, Yangmei, TW;
Lee-Chung Lu, Taipei, TW;
Meng-Hsueh Wang, Hsinchu, TW;
Chang-Yu Wu, Hsinchu, TW;
Assignee:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/04 (2006.01); H03K 19/00 (2006.01); H03K 3/033 (2006.01);
U.S. Cl.
CPC ...
H03K 19/0016 (2013.01); H03K 3/033 (2013.01); H03K 19/0013 (2013.01);
Abstract
A circuit includes a clock trigger block and a logic circuit. The logic circuit is configured to output a signal to the clock trigger block based on a logic level of an enable signal received at the logic circuit. The clock trigger block is configured to output an output signal response to a clock signal received at the clock trigger block and the signal received from the logic circuit.