The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 01, 2015
Filed:
Dec. 19, 2014
Applicant:
Texas Instruments Incorporated, Dallas, TX (US);
Inventors:
Shaoping Tang, Allen, TX (US);
Amitava Chatterjee, Plano, TX (US);
Imran Mahmood Khan, Richardson, TX (US);
Kaiping Liu, Plano, TX (US);
Assignee:
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 27/092 (2006.01); H01L 21/3213 (2006.01); H01L 21/8238 (2006.01); H01L 21/8234 (2006.01); H01L 29/66 (2006.01); H01L 21/265 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7836 (2013.01); H01L 21/32133 (2013.01); H01L 21/82385 (2013.01); H01L 21/823418 (2013.01); H01L 21/823807 (2013.01); H01L 21/823814 (2013.01); H01L 21/823892 (2013.01); H01L 27/0928 (2013.01); H01L 29/66575 (2013.01); H01L 21/26586 (2013.01); H01L 29/66537 (2013.01); H01L 29/7833 (2013.01);
Abstract
An integrated circuit and method includes a DEMOS transistor with improved CHC reliability that has a lower resistance surface channel under the DEMOS gate that transitions to a lower resistance subsurface channel under the drain edge of the DEMOS transistor gate.