The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 01, 2015

Filed:

May. 29, 2014
Applicant:

Sandisk 3d Llc, Milpitas, CA (US);

Inventors:

Tyler J. Thorp, San Francisco, CA (US);

Roy E. Scheuerlein, Cupertino, CA (US);

Assignee:

SanDisk 3D LLC, Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/12 (2006.01); G11C 8/08 (2006.01); G11C 13/00 (2006.01); G11C 7/06 (2006.01);
U.S. Cl.
CPC ...
G11C 7/12 (2013.01); G11C 7/065 (2013.01); G11C 8/08 (2013.01); G11C 13/0004 (2013.01); G11C 13/0023 (2013.01); G11C 13/0061 (2013.01); G11C 13/0069 (2013.01);
Abstract

A method is provided for programming a memory cell having a first terminal coupled to a word line and a second terminal coupled to a bit line. During a first predetermined time interval, the word line is switched from a first standby voltage to a first voltage, the bit line is switched from a second standby voltage to a predetermined voltage, and a voltage drop across the first and second terminals is a safe voltage that does not program the memory cell. During a second predetermined time interval, the word line is switched from the first voltage to a second voltage, and a voltage drop across the first and second terminals is a programming voltage that is sufficient to program the memory cell. Numerous other aspects are provided.


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