The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 01, 2015
Filed:
Aug. 01, 2014
Cadence Design Systems, Inc., San Jose, CA (US);
Daniel A. Cohen, Los Gatos, CA (US);
John LeRoy Pierce, Temple, NH (US);
Nir Weiss, San Diego, CA (US);
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
The present disclosure relates to a computer-implemented method for electronic design verification. Embodiments may include providing an electronic design including, at least in part, one or more hardware description languages and one or more software programming languages. Embodiment may also include calculating, using one or more processors, configuration information without analyzing the electronic design, wherein the configuration information includes one or more memory elements configured to control a mode of operation of the electronic design. Embodiments may further include storing a seed for each configuration, wherein each seed may be configured to cause a constraint solver to set a defined set of values for one or more random variables in a class associated with the seed.