The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 01, 2015

Filed:

Nov. 09, 2011
Applicants:

Jared L. Zerbe, Woodside, CA (US);

Ian P. Shaeffer, Los Gatos, CA (US);

John Eble, Chapel Hill, NC (US);

Inventors:

Jared L. Zerbe, Woodside, CA (US);

Ian P. Shaeffer, Los Gatos, CA (US);

John Eble, Chapel Hill, NC (US);

Assignee:

RAMBUS INC., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/04 (2006.01); G06F 1/12 (2006.01); G06F 13/16 (2006.01); G06F 1/10 (2006.01); G11C 7/22 (2006.01); G06F 1/06 (2006.01); G06F 1/08 (2006.01); H04L 7/033 (2006.01); G11C 7/04 (2006.01);
U.S. Cl.
CPC ...
G06F 1/04 (2013.01); G06F 1/06 (2013.01); G06F 1/08 (2013.01); G06F 1/10 (2013.01); G06F 13/161 (2013.01); G06F 13/1657 (2013.01); G06F 13/1689 (2013.01); G11C 7/222 (2013.01); G11C 7/04 (2013.01); H04L 7/033 (2013.01);
Abstract

A memory controller includes a clock generator to generate a first clock signal and a timing circuit to generate a second clock signal from the first clock signal. The second clock signal times communications with any of a plurality of memory devices in respective ranks, including a first memory device in a first rank and a second memory device in a second rank. The timing circuit is configured to adjust a phase of the first clock signal, when the memory controller is communicating with the second memory device, based on calibration data associated with the second memory device and timing adjustment data associated with feedback from at least the first memory device.


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