The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 24, 2015

Filed:

Apr. 10, 2012
Applicants:

Hyung Seok Kim, Portland, OR (US);

Ashoke Ravi, Hillsboro, OR (US);

William Y. LI, Portland, OR (US);

Kailash Chandrashekar, Hillsboro, OR (US);

Inventors:

Hyung Seok Kim, Portland, OR (US);

Ashoke Ravi, Hillsboro, OR (US);

William Y. Li, Portland, OR (US);

Kailash Chandrashekar, Hillsboro, OR (US);

Assignee:

INTEL CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/48 (2006.01); H04L 7/033 (2006.01); H03L 7/197 (2006.01); G04F 10/00 (2006.01);
U.S. Cl.
CPC ...
H04L 7/0331 (2013.01); G04F 10/005 (2013.01); H03L 7/1974 (2013.01);
Abstract

A re-circulating time-to-digital converter (TDC) can include a triggered reference ring oscillator (TRRO) and a delay module. The triggered reference ring oscillator can, when triggered by a reference signal edge, generate a periodic ring oscillator signal with a ring oscillator period that is a selected ratio of a voltage-controlled oscillator (VCO) period. The delay module can store, in a plurality of latches, samples of a VCO signal docked by the periodic ring oscillator signal. Each latch can generate an output of the sample, and each latch output can represent a time difference polarity between VCO signal and TRRO signal. In another example, the re-circulating TDC can include the triggered reference ring oscillator, a digital frequency lock module, and a TDC post-process module. The digital frequency lock module can generate a ring oscillator control signal, which sets the ring oscillator period for the triggered reference ring oscillator. The TDC post-process module can generate a TDC output, which can be a binary representation of a phase difference between a reference signal and a VCO signal.


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