The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 24, 2015

Filed:

Dec. 30, 2011
Applicants:

Charu Sardana, San Jose, CA (US);

Albert Ratnakumar, San Jose, CA (US);

Qi Xiang, San Jose, CA (US);

Bradley Jensen, San Jose, CA (US);

Inventors:

Charu Sardana, San Jose, CA (US);

Albert Ratnakumar, San Jose, CA (US);

Qi Xiang, San Jose, CA (US);

Bradley Jensen, San Jose, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/788 (2006.01); H01L 27/112 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7881 (2013.01); H01L 27/11206 (2013.01);
Abstract

A programmable device with a metal oxide semiconductor field effect transistor (MOSFET) surrounded by a programmable substrate region is described. The MOSFET has a source and drain region separated by a channel region with an insulating region and gate disposed above the channel region. A junction disposed within the substrate region controls the programmable substrate region. Biasing the junction depletes the substrate region, which isolates the body of the MOSFET from a secondary well. When the junction is left unbiased, the body of the MOSFET is electrically coupled to the secondary well.


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