The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 24, 2015

Filed:

Dec. 17, 2013
Applicants:

James W. Alexander, Hillsboro, OR (US);

Devadatta V. Bodas, Federal Way, WA (US);

Muralidhar Rajappa, Chandler, AZ (US);

Ramkumar Nagappan, Chandler, AZ (US);

Andy Hoffman, Olympia, WA (US);

Inventors:

James W. Alexander, Hillsboro, OR (US);

Devadatta V. Bodas, Federal Way, WA (US);

Muralidhar Rajappa, Chandler, AZ (US);

Ramkumar Nagappan, Chandler, AZ (US);

Andy Hoffman, Olympia, WA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 12/14 (2006.01);
U.S. Cl.
CPC ...
G06F 3/065 (2013.01); G06F 3/0614 (2013.01); G06F 3/0622 (2013.01); G06F 3/0673 (2013.01); G06F 12/14 (2013.01); G06F 12/1425 (2013.01);
Abstract

Mechanisms for exposing a protected memory address are provided. A processing device may store a data value at a protected memory address. The protected memory address may be a control register or a status register. The processing device may identify a mirror relationship between the protected memory address and an unprotected memory address and copy the data value from the protected memory address to the unprotected memory address. The unprotected memory address may be directly accessible via an external interface.


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