The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 17, 2015

Filed:

Nov. 10, 2014
Applicant:

Shinko Electric Industries Co., Ltd., Nagano, JP;

Inventors:

Tatsuaki Denda, Nagano, JP;

Kazutaka Kobayashi, Nagano, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/34 (2006.01); H01L 23/48 (2006.01); H01L 33/64 (2010.01); H05K 1/18 (2006.01); H05K 1/02 (2006.01); H05K 1/11 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 23/367 (2006.01); H01L 33/60 (2010.01); H01L 33/48 (2010.01); H01L 33/62 (2010.01);
U.S. Cl.
CPC ...
H05K 1/181 (2013.01); H01L 23/3677 (2013.01); H01L 23/49827 (2013.01); H01L 24/04 (2013.01); H01L 24/26 (2013.01); H01L 24/47 (2013.01); H01L 33/486 (2013.01); H01L 33/60 (2013.01); H05K 1/021 (2013.01); H05K 1/115 (2013.01); H01L 33/62 (2013.01); H01L 33/64 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48137 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/13055 (2013.01);
Abstract

A wiring substrate for a semiconductor device includes a heat spreader; a polyimide layer provided with through holes and provided on the heat spreader via an adhesion layer; through wirings formed to fill the through holes of the polyimide layer; a thermal diffusion wiring provided on the polyimide layer and is configured not to be electrically connected to the semiconductor device; an electrical connection wiring provided on the polyimide layer at a same plane with the thermal diffusion wiring and is configured to be electrically connected to the semiconductor device; and an insulating layer provided on the polyimide layer with a first open portion and a second open portion that expose the electrical connection wiring and the thermal diffusion wiring, respectively, the thermal diffusion wiring being formed to extend at an outer side of the second open portion and have a larger area than the electrical connection wiring.


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