The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 17, 2015
Filed:
Jun. 05, 2012
Applicant:
Dwayne Richard Shirley, Dallas, TX (US);
Inventor:
Dwayne Richard Shirley, Dallas, TX (US);
Assignee:
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/12 (2006.01); H01L 23/10 (2006.01); H01L 23/34 (2006.01); H01L 23/373 (2006.01); H01L 23/06 (2006.01); H01L 23/367 (2006.01); B32B 37/12 (2006.01); B32B 37/18 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3735 (2013.01); B32B 37/12 (2013.01); B32B 37/18 (2013.01); H01L 23/06 (2013.01); H01L 23/3675 (2013.01); B32B 2457/00 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73253 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/16152 (2013.01);
Abstract
A lid comprising a heat conductive substrate and a native silicon oxide layer connected to said substrate by at least one intermediate layer; a lidded integrated circuit package; and a method of providing a heat path through an integrated circuit package comprising providing a substrate with an exterior layer of native silicon oxide and interfacing the layer of native silicon oxide with a layer of thermal interface material.