The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9190332 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 17, 2015

Filed:

Feb. 20, 2014
Applicant:

Altera Corporation, San Jose, CA (US);

Inventors:

Jun Liu, Milpitas, CA (US);

Albert Ratnakumar, San Jose, CA (US);

Qi Xiang, San Jose, CA (US);

Jeffrey Xiaoqi Tung, Palo Alto, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 21/02 (2006.01); H01L 21/8238 (2006.01); H01L 29/66 (2006.01); H01L 21/28 (2006.01); H01L 29/78 (2006.01); H01L 29/49 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823842 (2013.01); H01L 21/28 (2013.01); H01L 21/28061 (2013.01); H01L 29/66477 (2013.01); H01L 29/7831 (2013.01); H01L 29/49 (2013.01); H01L 29/66545 (2013.01);
Abstract

Metal-oxide-semiconductor transistors are provided. A metal-oxide-semiconductor transistor may be formed on a semiconductor substrate. Source and drain regions may be formed in the substrate. A gate insulator such as a high-K dielectric may be formed between the source and drain regions. A gate may be formed from multiple gate conductors. The gate conductors may be metals with different workfunctions. A first of the gate conductors may form a pair of edge gate conductors that are adjacent to dielectric spacers. An opening between the edge gate conductors may be filled with the second gate conductor to form a center gate conductor. A self-aligned gate formation process may be used in fabricating the metal-oxide-semiconductor transistor.


Find Patent Forward Citations

Liu, Jun. (2015). Method of fabricating integrated circuit transistors with multipart gate conductors (U.S. Patent No. 9190332). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9190332

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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