The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 17, 2015
Filed:
Jun. 03, 2014
Applicant:
Samsung Electronics Co., Ltd., Suwon-Si, Gyeonggi-Do, KR;
Inventors:
Young-jo Tak, Hwaseong-si, KP;
Jae-kyun Kim, Hwaseong-si, KR;
Joo-sung Kim, Seongnam-si, KR;
Jun-youn Kim, Hwaseong-si, KR;
Young-soo Park, Yongin-si, KR;
Eun-ha Lee, Seoul, KR;
Assignee:
SAMSUNG ELECTRONICS CO., LTD., Gyeonggi-Do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 33/00 (2010.01); H01L 33/12 (2010.01); H01L 33/32 (2010.01); H01S 5/00 (2006.01); H01S 5/02 (2006.01); H01S 5/343 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0254 (2013.01); H01L 21/02381 (2013.01); H01L 21/02458 (2013.01); H01L 21/02505 (2013.01); H01L 33/007 (2013.01); H01L 33/12 (2013.01); H01L 33/325 (2013.01); H01S 5/0014 (2013.01); H01S 5/021 (2013.01); H01S 5/34333 (2013.01);
Abstract
Provided are a low-defect semiconductor device and a method of manufacturing the same. The method includes forming a buffer layer on a silicon substrate, forming an interface control layer on the buffer layer under a first growth condition, and forming a nitride stack on the interface control layer under a second growth condition different from the first growth condition.