The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 17, 2015

Filed:

Mar. 30, 2012
Applicants:

Darshan Kobla, Austin, TX (US);

David Zimmerman, El Dorado Hills, CA (US);

John C. Johnson, Phoenix, AZ (US);

Vimal K. Natarajan, Portland, OR (US);

Inventors:

Darshan Kobla, Austin, TX (US);

David Zimmerman, El Dorado Hills, CA (US);

John C. Johnson, Phoenix, AZ (US);

Vimal K. Natarajan, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G11C 29/18 (2006.01); G11C 29/36 (2006.01); G11C 11/40 (2006.01);
U.S. Cl.
CPC ...
G11C 29/18 (2013.01); G11C 29/36 (2013.01); G11C 11/40 (2013.01);
Abstract

A generic data scrambler is provided for a built-in self-test (BIST) engine of a stacked memory device. The stacked memory device includes a memory stack of one or more memory layers; and a system element that is coupled with the memory stack. The system element includes a memory controller for the memory stack; a BIST circuit for testing of the memory stack; and a generic data scrambler for scrambling of data according to a data scrambling algorithm for the memory stack. The generic data scrambler includes a programmable lookup table to hold data factors for each possible outcome of the data scrambling algorithm, and the programmable lookup table is to generate a set of data factors based on addresses of data for testing of the memory stack.


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