The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 17, 2015

Filed:

May. 31, 2013
Applicant:

Avago Technologies General Ip (Singapore) Pte. Ltd., Singapore, SG;

Inventors:

David Linam, Fort Collins, CO (US);

Scott T. Evans, Fort Collins, CO (US);

Guy Humphrey, Fort Collins, CO (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/22 (2006.01); G06F 13/16 (2006.01); H04L 7/00 (2006.01);
U.S. Cl.
CPC ...
G11C 7/222 (2013.01); G06F 13/1689 (2013.01); G11C 7/22 (2013.01); H04L 7/0037 (2013.01); H04L 7/0041 (2013.01);
Abstract

Preamble release training in a double data-rate dynamic random access memory interface uses feedback from read operations to adjust the preamble release signal so that the preamble release signal continues to be activated close to the middle of the preamble. A first signal, and then a second signal, are generated in response to an initiation of a read operation. The first and second signals are characterized by a delay from the initiation of the read operation of one or more clock cycles plus a fine delay contributed by an adjustable delay circuit. The first signal is provided to a data strobe parking circuit that uses it to release or un-park the data strobe signal lines. The second signal is phase-compared with the data strobe signal associated with incoming data during the read operation. The adjustable delay circuit is adjusted in response to the result of the comparison.


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