The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 17, 2015

Filed:

Aug. 23, 2013
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Chirag Gulati, Kota, IN;

Ritu Chaba, San Diego, CA (US);

Lakshmikantha Holla Vakwadi, Bangalore, IN;

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/3185 (2006.01); G11C 29/32 (2006.01); G11C 29/36 (2006.01);
U.S. Cl.
CPC ...
G01R 31/318541 (2013.01); G01R 31/318597 (2013.01); G11C 29/32 (2013.01); G11C 29/36 (2013.01); G11C 2029/3202 (2013.01); G11C 2029/3602 (2013.01);
Abstract

A method of operating an apparatus in a functional mode and an ATPG scan mode and an apparatus for use in a functional mode and an ATPG scan mode are provided. The apparatus includes a set of latches including a first latch and a second latch. The first latch is operated as a master latch and the second latch is operated as a master latch in the functional mode. The first latch is operated as a master latch of a flip-flop and the second latch is operated as a slave latch of the flip-flop in the ATPG scan mode. In one configuration, the apparatus includes a plurality of latches including at least the first and second latches, an output of each of the latches is coupled to a digital circuit, the apparatus includes a plurality of functional inputs, and each of the functional inputs is input to the digital circuit.


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