The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 17, 2015
Filed:
May. 25, 2012
Takeshi Toyosawa, Houston, TX (US);
Jiun-chung Wang, Houston, TX (US);
Chung I. Tan, Houston, TX (US);
Takeshi Toyosawa, Houston, TX (US);
Jiun-Chung Wang, Houston, TX (US);
Chung I. Tan, Houston, TX (US);
Geospace Technologies, LP, Houston, TX (US);
Abstract
A new structure (FIG.) for a thick-film thermal printhead and a variety of implementation approaches for controlling such a printhead. In the structure of the invention, the conductive lead at each end of the heater element is switched to either the power supply (Vhd) or ground, depending on the corresponding nib data bit. The improvement over a traditional center-tap structure (FIG.) is the reduction of density of conductive leads to achieve the resolution of printed dots. Compared to the printhead structure of alternated conductive system, either with diodes (FIG.) or without diodes (FIG.), which both suffer from the introduction of undesirable leaking currents, the printhead structure of the invention provides the advantage of eliminating leakage current completely. Control of the thermal printhead according to the invention is based on the sequential exclusive-OR (XOR) logic operation applied to the shifted-in nib data bit stream. The XOR functionality may be incorporated in the driver IC, embedded in the raster data processing FPGA (Field Programming Gate Array), or implemented in the form of a lookup table in the memory block of a main processor system. All prior art advanced controls based on a multi-pulse strategy can be applied directly from those used in prior art printhead structures to the controls for the thermal printhead for this invention without modification. A new driver IC (FIG.) is also disclosed according to the invention in which the outputs are SPDT (Single-Pole-Double-Throw) switches and the built-in XOR gates can be configured to act in the pass-through mode, if required, so that the new driver IC may be used as a traditional driver IC.