The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2015

Filed:

Aug. 31, 2012
Applicants:

Sarunya Bangsaruntip, Yorktown Heights, NY (US);

Guy M. Cohen, Yorktown Heights, NY (US);

Shreesh Narasimha, Yorktown Heights, NY (US);

Jeffrey W. Sleight, Yorktown Heights, NY (US);

Inventors:

Sarunya Bangsaruntip, Yorktown Heights, NY (US);

Guy M. Cohen, Yorktown Heights, NY (US);

Shreesh Narasimha, Yorktown Heights, NY (US);

Jeffrey W. Sleight, Yorktown Heights, NY (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/786 (2006.01); B82Y 10/00 (2011.01); B82Y 40/00 (2011.01); H01L 21/84 (2006.01); H01L 27/12 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 29/78696 (2013.01); B82Y 10/00 (2013.01); B82Y 40/00 (2013.01); H01L 21/84 (2013.01); H01L 27/1203 (2013.01); H01L 29/0665 (2013.01); H01L 29/0673 (2013.01); H01L 29/42392 (2013.01); H01L 29/66439 (2013.01); H01L 29/66772 (2013.01); H01L 29/66469 (2013.01);
Abstract

An integrated circuit includes a plurality of gate-all-around (GAA) nanowire field effect transistors (FETs), a plurality of omega-gate nanowire FETs, and a plurality of planar channel FETs, wherein the plurality of GAA FETs, the plurality of omega-gate nanowire FETs, and the plurality of planar channel FETs are disposed on a single wafer.


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