The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2015

Filed:

Sep. 15, 2014
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Jui-Yao Lai, Yuanlin Township, TW;

Yen-Ming Chen, Chu-Pei, TW;

Shyh-Wei Wang, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 29/737 (2006.01); H01L 29/66 (2006.01); H01L 29/8605 (2006.01); H01L 21/265 (2006.01); H01L 21/283 (2006.01); H01L 29/165 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 29/737 (2013.01); H01L 21/265 (2013.01); H01L 21/283 (2013.01); H01L 29/165 (2013.01); H01L 29/66166 (2013.01); H01L 29/66242 (2013.01); H01L 29/7378 (2013.01); H01L 29/8605 (2013.01); H01L 29/0649 (2013.01);
Abstract

Methods and apparatus for bipolar junction transistors (BJTs) are disclosed. A BJT comprises a collector made of p-type semiconductor material, a base made of n-type well on the collector; and an emitter comprising a p+ region on the base and a SiGe layer on the p+ region. The BJT can be formed by providing a semiconductor substrate comprising a collector, a base on the collector, forming a sacrificial layer on the base, patterning a first photoresist on the sacrificial layer to expose an opening surrounded by a STI within the base; implanting a p-type material through the sacrificial layer into an area of the base, forming a p+ region from the p-type implant; forming a SiGe layer on the etched p+ region to form an emitter. The process can be shared with manufacturing a polysilicon transistor up through the step of patterning a first photoresist on the sacrificial layer.


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