The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2015

Filed:

Feb. 06, 2014
Applicant:

Seiko Instruments Inc., Chiba, JP;

Inventors:

Shinya Kubota, Chiba, JP;

Masaru Akino, Chiba, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 23/495 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49503 (2013.01); H01L 23/3107 (2013.01); H01L 23/49541 (2013.01); H01L 23/49548 (2013.01); H01L 23/49582 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 24/85 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/451 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/83439 (2013.01); H01L 2224/85439 (2013.01);
Abstract

A method of manufacturing a resin-encapsulated semiconductor device capable of supporting finer pitches comprises forming a metal plating layer on an inner lead and an outer lead of a lead. A semiconductor chip is mounted on a die pad, and an electrode on a surface of the semiconductor chip is electrically connected to the inner lead via a thin metal wire. The semiconductor chip, the thin metal wire and the inner lead are encapsulated by an encapsulation resin so that the outer lead extends beyond the encapsulation resin and is exposed. Resin burrs formed during resin encapsulation are removed by a defocused laser, and any metal adhered on the lead is lifted off.


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