The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2015

Filed:

Aug. 31, 2006
Applicants:

Noy C. Kucuk, Calgary, CA;

Chengzhou LI, Whitehall, PA (US);

Jinhui LI, Macungie, PA (US);

Evstratios Vandris, Worcester, PA (US);

Inventors:

Noy C. Kucuk, Calgary, CA;

Chengzhou Li, Whitehall, PA (US);

Jinhui Li, Macungie, PA (US);

Evstratios Vandris, Worcester, PA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04W 28/14 (2009.01); H04L 12/54 (2013.01); H04L 12/863 (2013.01);
U.S. Cl.
CPC ...
H04W 28/14 (2013.01); H04L 12/5693 (2013.01); H04L 47/6255 (2013.01);
Abstract

A scheduler having improved throughput is disclosed, for scheduling packets or other data blocks for transmission from a plurality of transmission elements in timeslots in a communication system. The scheduler determines for the transmission elements respective channel capacities, and adjusts one or more of the channel capacities based on amounts of data available to transmit in the corresponding transmission elements. The scheduler then selects one or more of the transmission elements for scheduling in a given one of the timeslots based on the one or more adjusted channel capacities. The scheduler in an illustrative embodiment may be implemented in a network processor integrated circuit or other processing device of the communication system.


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