The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 03, 2015
Filed:
Mar. 09, 2012
Applicants:
Nicolas Daval, Pleasantville, NY (US);
Cécile Aulnette, Guilderland, NY (US);
Bich-yen Nguyen, Austin, TX (US);
Inventors:
Nicolas Daval, Pleasantville, NY (US);
Cécile Aulnette, Guilderland, NY (US);
Bich-Yen Nguyen, Austin, TX (US);
Assignee:
SOITEC, Bernin, FR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 27/108 (2006.01); H01L 21/762 (2006.01); H01L 21/84 (2006.01); H01L 27/12 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10894 (2013.01); H01L 21/76254 (2013.01); H01L 21/84 (2013.01); H01L 27/10861 (2013.01); H01L 27/1203 (2013.01); H01L 29/66181 (2013.01); H01L 27/1207 (2013.01);
Abstract
The present disclosure relates to a method for the manufacture of a wafer by providing a doped layer on a semiconductor substrate; providing a first semiconductor layer on the doped layer; providing a buried oxide layer on the first semiconductor layer; and providing a second semiconductor layer on the buried oxide layer to form a wafer having a buried oxide layer and a doped layer beneath the buried oxide layer. The disclosure also relates to the wafer that is produced by the new method.