The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2015

Filed:

Oct. 31, 2013
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-Do, KR;

Inventors:

Mi-Na Choi, Yongin-si, KR;

Ji-Chul Kim, Yongin-si, KR;

Se-Ran Bae, Yongin-si, KR;

Eun-Seok Cho, Suwon-si, KR;

Hee-Jung Hwang, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/34 (2006.01); G01R 31/28 (2006.01); H01L 21/66 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/345 (2013.01); G01R 31/2875 (2013.01); H01L 23/34 (2013.01); H01L 22/34 (2013.01); H01L 24/16 (2013.01); H01L 2224/16225 (2013.01); H01L 2924/15311 (2013.01);
Abstract

Semiconductor test devices and methods for fabricating the same may be provided. The semiconductor test device may include a first thermal test flip chip cell including a first heater and a first sensor, and a test substrate formed under the first thermal test flip chip cell. The first thermal test flip chip cell may include a plurality of first bumps arranged on a bottom surface of the first thermal test flip chip cell and be configured to be electrically connected to the first heater and the first sensor. The test substrate may include a first ball array arranged on a bottom surface of the test substrate in a first direction and be configured to be electrically connected to the plurality of first bumps, which are electrically connected to the first heater and the first sensor.


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