The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 27, 2015

Filed:

May. 28, 2013
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Geovanny Rodriguez, Alburgh, VT (US);

Brian J. Vincent, Essex Junction, VT (US);

Timothy J. Vonreyn, Williston, VT (US);

Assignee:

GLOBALFOUNDRIES U.S. 2 LLC, Hopewell Junction, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G11C 29/44 (2006.01); G11C 29/30 (2006.01);
U.S. Cl.
CPC ...
G11C 29/44 (2013.01); G11C 29/30 (2013.01); G11C 2029/4402 (2013.01);
Abstract

Integrated circuits with memory built-in self-test (BIST) logic and methods of testing using the same are disclosed. The method includes setting an address window for locating defects in a memory array. The method further includes comparing output data of the memory array to expected data to determine that a defect exists at location 'M' in the memory array within the address window. The method further includes storing, in registers, the address M and a resultant bit fail vector associated with the location 'M' of the defect found in the memory array. The method further includes resetting the registers to a null value and resetting the address window with a new minimum and maximum address pair, to compare the output data of the memory array to the expected data within the reset address window which excludes address M.


Find Patent Forward Citations

Rodriguez, Geovanny. (2015). Address windowing for at-speed bitmapping with memory built-in self-test (U.S. Patent No. 9171645). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9171645

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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