The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 27, 2015

Filed:

Jun. 19, 2013
Applicant:

Unitest Inc, Yongin-si, Gyeonggi-do, KR;

Inventors:

Eui Won Lee, Seongnam-si, KR;

Hyo Jin Oh, Yongin-si, KR;

Assignee:

UNITEST INC, Yongin, Gyeonggi-Do, KR;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G11C 29/10 (2006.01); G06F 11/22 (2006.01); G11C 29/56 (2006.01); G11C 29/04 (2006.01);
U.S. Cl.
CPC ...
G11C 29/10 (2013.01); G06F 11/2221 (2013.01); G11C 29/56008 (2013.01); G11C 2029/0401 (2013.01); G11C 2029/5602 (2013.01); G11C 2029/5606 (2013.01);
Abstract

Disclosed is a solid state drive tester which reduces the size of the tester and easily changes a function without changing hardware (H/W) by implementing a plurality of devices for testing an SSD as one chip using a Field Programmable Gate Array (FPGA). The solid state drive tester includes: a host terminal receiving a test condition for testing a storage from a user; and a test control unit generating a test pattern corresponding to the test condition, adaptively selecting an interface according to an interface type of the storage to be tested to test the storage using the test pattern, and storing fail data generated during the test in an internal memory. The test control unit is implemented by an FPGA to reduce the size of the tester and easily change a function without hardware.


Find Patent Forward Citations

Loading…