The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2015

Filed:

May. 07, 2014
Applicant:

Macronix International Co., Ltd., Hsinchu, TW;

Inventors:

Chi-Sheng Peng, Hsinchu, TW;

Chia-Wen Cheng, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/49 (2006.01); H01L 29/423 (2006.01); H01L 21/3205 (2006.01); H01L 21/285 (2006.01); H01L 21/311 (2006.01); H01L 21/321 (2006.01); H01L 29/51 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/4933 (2013.01); H01L 21/28518 (2013.01); H01L 21/31111 (2013.01); H01L 21/3211 (2013.01); H01L 21/32053 (2013.01); H01L 21/32105 (2013.01); H01L 29/42364 (2013.01); H01L 29/51 (2013.01); H01L 29/518 (2013.01); H01L 29/665 (2013.01); H01L 29/78 (2013.01);
Abstract

Provided is a method for fabricating a semiconductor device including the following steps. A silicon-containing conductive layer is formed on a substrate. Then, a dielectric layer is formed around the silicon-containing conductive layer. A portion of the dielectric layer is removed to expose a first sidewall of the silicon-containing conductive layer. A shielding structure is formed on a partial surface of the silicon-containing conductive layer, and the shielding structure exposes at least the first sidewall. A metal layer is formed on the substrate to cover the silicon-containing conductive layer not covered by the shielding structure. A salicide process is performed to form a silicide layer.


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