The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 20, 2015
Filed:
Sep. 05, 2014
Applicants:
Boon Yew Low, Petaling Jaya, MY;
Ngak Thong Teo, Kuala Lumpur, MY;
Inventors:
Boon Yew Low, Petaling Jaya, MY;
Ngak Thong Teo, Kuala Lumpur, MY;
Assignee:
FREESCALE SEMICONDUCTOR, INC., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/498 (2006.01); H01L 23/532 (2006.01); H01L 23/31 (2006.01); H01L 21/768 (2006.01); H01L 21/288 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 23/481 (2013.01); H01L 21/2885 (2013.01); H01L 21/561 (2013.01); H01L 21/566 (2013.01); H01L 21/76802 (2013.01); H01L 21/76879 (2013.01); H01L 23/3107 (2013.01); H01L 23/49838 (2013.01); H01L 23/49866 (2013.01); H01L 23/53228 (2013.01);
Abstract
A semiconductor device package such a as Ball Grid Array (BGA), includes a die attached to a substrate. The substrate has a series of plated through holes (PTH) that include a copper pad at each of their ends. The PTH are located in a mold gate region at a corner of the substrate beyond the periphery of the die. Each PTH contains a rivet. The PTH with the pads and rivets stabilize the substrate at the mold gate region, which reduces the possibility of substrate delamination upon degating following an encapsulation process.