The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 20, 2015
Filed:
Jul. 17, 2014
Applicant:
Altera Corporation, San Jose, CA (US);
Inventors:
Jun Liu, Milpitas, CA (US);
Albert Ratnakumar, San Jose, CA (US);
Irfan Rahim, Milpitas, CA (US);
Qi Xiang, San Jose, CA (US);
Assignee:
Altera Corporation, San Jose, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 11/412 (2006.01);
U.S. Cl.
CPC ...
G11C 11/412 (2013.01);
Abstract
A method that includes using a PMOS pass gate to couple a first line to a second line, where a gate terminal of the PMOS pass gate is coupled to an output terminal of a memory cell, is described. In one implementation, the PMOS pass gate has a negative threshold voltage. In one implementation, the first line and the second line are respectively first and second interconnect lines of an IC.