The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 20, 2015
Filed:
Jan. 18, 2012
Anil Sharma, Santa Clara, CA (US);
Kanaka Lakshimi Siva Prasad Gadey Naga Venkata, Fremont, CA (US);
Gurushankar Rajamani, Sunnyvale, CA (US);
Anil Sharma, Santa Clara, CA (US);
Kanaka Lakshimi Siva Prasad Gadey Naga Venkata, Fremont, CA (US);
Gurushankar Rajamani, Sunnyvale, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Embodiments of the invention describe an apparatus, system and method for executing self-correction logic for serial-to-parallel data converters. Embodiments of the invention receive one of a plurality of serial data streams from a peripheral device, each of the serial data streams having one or more bits. In response to detecting that a shift register chain includes a register select value, embodiments of the invention may store the received serial data stream in one of a plurality of data registers, wherein the one data register is selected based, at least in part, on a position of the register select value in the shift register chain. In response to detecting the shift register chain does contain the register select value, embodiments of the invention may insert the register select value at a register of the shift register chain.