The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9164836 B1

PDF
Full Text
Expired
Date of Patent:
Oct. 20, 2015

Filed:

Dec. 28, 2011
Applicants:

Xin Guo, San Jose, CA (US);

Kiran Pangal, Fremont, CA (US);

Yogesh B. Wakchaure, Folsom, CA (US);

Paul D. Ruby, Folsom, CA (US);

Ravi J. Kumar, Redwood City, CA (US);

Inventors:

Xin Guo, San Jose, CA (US);

Kiran Pangal, Fremont, CA (US);

Yogesh B. Wakchaure, Folsom, CA (US);

Paul D. Ruby, Folsom, CA (US);

Ravi J. Kumar, Redwood City, CA (US);

Assignee:

INTEL CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/10 (2006.01); G11C 11/56 (2006.01); G11C 16/06 (2006.01); G11C 16/26 (2006.01); G11C 16/34 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1068 (2013.01); G11C 11/5642 (2013.01); G11C 16/06 (2013.01); G11C 16/26 (2013.01); G11C 16/3409 (2013.01);
Abstract

Examples are disclosed for cycling endurance extending for memory cells of a non-volatile memory array. The examples include implementing one or more endurance extending schemes based on program/erase cycle counts or a failure trigger. The one or more endurance extending schemes may include a gradual read window expansion, a gradual read window shift, an erase blank check algorithm, a dynamic soft-program or a dynamic pre-program.


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