The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2015

Filed:

May. 23, 2014
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Ethan Schuchman, Santa Clara, CA (US);

Hong Wang, Santa Clara, CA (US);

Chris Weaver, Austin, TX (US);

Belliappa M. Kuttanna, Austin, TX (US);

Asit Mallick, Saratoga, CA (US);

Vivek K. De, Beaverton, OR (US);

Per Hammarlund, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2006.01); G06F 1/32 (2006.01); G06F 9/46 (2006.01);
U.S. Cl.
CPC ...
G06F 9/30083 (2013.01); G06F 1/3203 (2013.01); G06F 1/324 (2013.01); G06F 1/3234 (2013.01); G06F 1/3237 (2013.01); G06F 1/3246 (2013.01); G06F 1/3265 (2013.01); G06F 1/3268 (2013.01); G06F 1/3296 (2013.01); G06F 9/3012 (2013.01); G06F 9/3013 (2013.01); G06F 9/30043 (2013.01); G06F 9/30105 (2013.01); G06F 9/461 (2013.01); Y02B 60/1217 (2013.01); Y02B 60/1221 (2013.01); Y02B 60/1242 (2013.01); Y02B 60/1246 (2013.01); Y02B 60/1285 (2013.01); Y02B 60/32 (2013.01);
Abstract

Methods and apparatuses for reducing power consumption of processor switch operations are disclosed. One or more embodiments may comprise specifying a subset of registers or state storage elements to be involved in a register or state storage operation, performing the register or state storage operation, and performing a switch operation. The embodiments may minimize the number of registers or state storage elements involved with the standby operation by specifying only the subset of registers or state storage elements, which may involve considerably fewer than the total number of registers or state storage or elements of the processor. The switch operation may be switch from one mode to another, such as a transition to or from a sleep mode, a context switch, or the execution of various types of instructions.


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