The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2015

Filed:

Sep. 17, 2013
Applicant:

Samsung Electronics Co., Ltd., Suwon-Si, Gyeonggi-Do, KR;

Inventors:

Hyongsoo Kim, Hwaseong-si, KR;

Jin-Su Lee, Hwaseong-si, KR;

Hojun Kwon, Seoul, KR;

Dongkyun Park, Suwon-si, KR;

Jiseung Lee, Seoul, KR;

Young-Seok Choi, Yongin-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01); H01L 49/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10817 (2013.01); H01L 27/10852 (2013.01); H01L 28/40 (2013.01); H01L 28/91 (2013.01);
Abstract

Capacitor of a semiconductor device, and a method of fabricating the same, include sequentially forming a mold structure and a polysilicon pattern over a semiconductor substrate, patterning the mold structure using the polysilicon pattern as an etch mask to form lower electrode holes penetrating the mold structure, forming a protection layer covering a surface of the polysilicon pattern, forming lower electrodes in the lower electrode holes provided with the protection layer, removing the polysilicon pattern and the protection layer to expose upper sidewalls of the lower electrodes, removing the mold structure to expose lower sidewalls of the lower electrodes, and sequentially forming a dielectric and an upper electrode covering the lower electrodes.


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