The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 13, 2015
Filed:
Jul. 02, 2012
Vivek Asthana, Greater Noida, IN;
Malathi Kar, Delhi, IN;
Philippe Galy, La Touvet, FR;
Jean Jimenez, Saint Theoffrey, FR;
Vivek Asthana, Greater Noida, IN;
Malathi Kar, Delhi, IN;
Philippe Galy, La Touvet, FR;
Jean Jimenez, Saint Theoffrey, FR;
STMicroelectronics International N.V., Amsterdam, NL;
STMicroelectronics SA, Montrouge, FR;
Abstract
An SRAM bitcell includes first and second CMOS inverters connected as a latch defining a true node and a complement node. The bitcell further includes true and complement bitline nodes. A first direct connection is provided between the true bitline node and a back gate of at least a p-channel transistor, and perhaps also an n-channel transistor, in the second CMOS inverter. A second direct connection is provided between the complement bitline node and a back gate of at least a p-channel transistor, and perhaps also an n-channel transistor, in the first CMOS inverter. A first pass transistor is coupled between the true bitline node and the true node, and a second pass transistor is coupled between the complement bitline node and the complement node. Direct connections are also provided between a wordline and the back gates of each of the first and second pass transistors.