The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2015

Filed:

Dec. 29, 2011
Applicants:

Ilhyun Kim, Beaverton, OR (US);

Alexandre J. Farcy, Hillsboro, OR (US);

Choon Wei Khor, Gelugor, MY;

Robert L. Hinton, Hillsboro, OR (US);

Inventors:

Ilhyun Kim, Beaverton, OR (US);

Alexandre J. Farcy, Hillsboro, OR (US);

Choon Wei Khor, Gelugor, MY;

Robert L. Hinton, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/08 (2006.01); G06F 9/38 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0875 (2013.01); G06F 9/3802 (2013.01); G06F 12/0862 (2013.01);
Abstract

This disclosure provides techniques and apparatuses to enable early, run-ahead handling of IC and ITLB misses by decoupling the ITLB and IC tag lookups from the IC data (instruction bytes) accesses, and making ITLB and IC tag lookups run ahead of the IC data accesses. This allows overlapping the ITLB and IC miss stall cycles with older instruction byte reads or older IC misses, resulting in fewer stalls than previous implementations and improved performance


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