The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2015

Filed:

May. 23, 2014
Applicants:

Kiyotaka Imai, Seongnam-si, KR;

Young-gwon Kim, Busan, KR;

Shigenobu Maeda, Seongnam-si, KR;

Soon-chul Hwang, Anyang-si, KR;

Inventors:

Kiyotaka Imai, Seongnam-si, KR;

Young-Gwon Kim, Busan, KR;

Shigenobu Maeda, Seongnam-si, KR;

Soon-Chul Hwang, Anyang-si, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 21/02 (2006.01); H01L 21/266 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66545 (2013.01); H01L 21/02667 (2013.01); H01L 21/266 (2013.01); H01L 21/823418 (2013.01); H01L 29/7833 (2013.01);
Abstract

A method for fabricating a semiconductor device is provided, which includes forming a screen layer on a substrate, the screen layer including a first portion doped with a first type impurity, forming a first undoped semiconductor layer on the screen layer, forming a gate structure on the first semiconductor layer, forming a first amorphous region on both sides of the gate structure in the first semiconductor layer, and re-crystallizing the first amorphous region through performing a first heat treatment of the first amorphous region.


Find Patent Forward Citations

Loading…