The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 06, 2015
Filed:
Feb. 23, 2009
Gulzar A. Kathawala, Santa Clara, CA (US);
Zhizheng Liu, San Jose, CA (US);
Kuo Tung Chang, Saratoga, CA (US);
Lei Xue, Milpitas, CA (US);
Gulzar A. Kathawala, Santa Clara, CA (US);
Zhizheng Liu, San Jose, CA (US);
Kuo Tung Chang, Saratoga, CA (US);
Lei Xue, Milpitas, CA (US);
Cypress Semiconductor Corporation, San Jose, CA (US);
Abstract
Semiconductor devices having reduced parasitic current and methods of malting the semiconductor devices are provided. Further provided are memory devices having reduced adjacent wordline disturb. The memory devices contain wordlines formed over a semiconductor substrate, wherein at least one wordline space is formed between the wordlines. Adjacent wordline disturb is reduced by implanting one or more of indium, boron, and a combination of boron and indium in the surface of the at least one wordline space.