The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 06, 2015
Filed:
Aug. 05, 2014
Applicant:
SK Hynix Inc., Icheon, KR;
Inventors:
Ki Jun Sung, Cheongju, KR;
Seung Jee Kim, Seongnam, KR;
Jong Hyun Nam, Seoul, KR;
Sang Yong Lee, Yongin, KR;
Young Geun Yoo, Bucheon, KR;
Assignee:
SK Hynix Inc., Icheon, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0652 (2013.01); H01L 25/0657 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06548 (2013.01); H01L 2225/06555 (2013.01); H01L 2225/06589 (2013.01); H01L 2225/06593 (2013.01);
Abstract
A chip stack embedded package includes a first dielectric layer having a multistep cavity therein, a first plurality of semiconductor chips disposed in a first level of the multistep cavity, a second plurality of semiconductor chips disposed in a second level of the multistep cavity, and a second dielectric layer filling the multistep cavity to cover the first and second pluralities of semiconductor chips.
Quick Actions:
Sung, Ki. (2015). Chip stack embedded packages (U.S. Patent No. 9153557). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9153557
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile