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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9148139 B1

PDFFull Text
Date of Patent:
Sep. 29, 2015

Filed:

Aug. 04, 2014

Monolithically integrated cascode switches

Applicant:

United Silicone Carbide, Inc., Monmouth Junction, NJ (US);

Inventors:

Anup Bhalla, Princeton Junction, NJ (US);

Zhongda Li, Somerset, NJ (US);

Assignee:

United Silicon Carbide, Inc., Monmouth Junction, NJ (US);

Attorney:

Baker & Hostetler LLP

Primary Examiner:

Roy Potter

Assistant Examiner:

Paul Patton

Int. Cl.
CPC ...
H01L 29/80 (2006.01); H03K 17/687 (2006.01); H01L 21/768 (2006.01); H01L 21/8234 (2006.01); H01L 23/535 (2006.01); H01L 27/06 (2006.01); H01L 29/78 (2006.01); H01L 29/808 (2006.01); H01L 21/82 (2006.01); H01L 27/088 (2006.01); H01L 27/098 (2006.01);
U.S. Cl.
CPC ...
H03K 17/687 (2013.01); H01L 21/76897 (2013.01); H01L 21/8213 (2013.01); H01L 21/823475 (2013.01); H01L 23/535 (2013.01); H01L 27/0617 (2013.01); H01L 27/088 (2013.01); H01L 27/098 (2013.01); H01L 29/78 (2013.01); H01L 29/808 (2013.01);
Abstract

Disclosed inventions are directed to advanced high-voltage switches with improved performance characteristics, increased reliability, and better compatibility with conventional gate drivers. The inventions disclosed herein implement a hybrid switch, comprising a high-voltage normally-on SiC VJFET, controlled via a low-voltage Si MOSFET in a cascode (Baliga-pair) configuration. The SiC VJFET and Si MOSFET are integrated monolithically at a wafer level, with the Si MOSFET fabricated on the Si layer that is directly adjacent to a dielectric layer on top of the SiC VJFET. Methods of making and operating these switches are also provided.

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