The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 29, 2015
Filed:
Oct. 27, 2010
Applicant:
Jeffrey S. Leal, Scotts Valley, CA (US);
Inventor:
Jeffrey S. Leal, Scotts Valley, CA (US);
Assignee:
Invensas Corporation, San Jose, CA (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/31 (2006.01); H01L 21/469 (2006.01); H01L 21/56 (2006.01); H01L 21/02 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 21/56 (2013.01); H01L 21/02282 (2013.01); H01L 21/02288 (2013.01); H01L 24/24 (2013.01); H01L 24/25 (2013.01); H01L 24/82 (2013.01); H01L 25/0657 (2013.01); H01L 2224/24145 (2013.01); H01L 2224/76155 (2013.01); H01L 2224/82102 (2013.01); H01L 2225/06551 (2013.01); H01L 2225/06562 (2013.01); H01L 2924/01005 (2013.01); H01L 2924/01006 (2013.01); H01L 2924/01013 (2013.01); H01L 2924/01033 (2013.01); H01L 2924/01047 (2013.01); H01L 2924/01056 (2013.01); H01L 2924/01074 (2013.01); H01L 2924/01082 (2013.01); H01L 2924/14 (2013.01);
Abstract
Additive processes are employed for electrically insulating selected surface regions on a stack of die; and methods for electrically interconnecting die in a stack of die, include additive processes for electrically insulating selected surface regions of the die. Regions that are not insulated according to the invention are available for electrical connection using electrically conductive material applied in flowable form to make electrically conductive traces.