The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 22, 2015
Filed:
Dec. 20, 2011
Sheng-chen Chung, Jhubei, TW;
Ming Zhu, Singapore, SG;
Harry-hak-lay Chuang, Singapore, SG;
Bao-ru Young, Zhubei, TW;
Wei-cheng Wu, Zhubei, TW;
Chia Ming Liang, Taipei, TW;
Sin-hua Wu, Zhubei, TW;
Sheng-Chen Chung, Jhubei, TW;
Ming Zhu, Singapore, SG;
Harry-Hak-Lay Chuang, Singapore, SG;
Bao-Ru Young, Zhubei, TW;
Wei-Cheng Wu, Zhubei, TW;
Chia Ming Liang, Taipei, TW;
Sin-Hua Wu, Zhubei, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
A method includes forming a PMOS device. The method includes forming a gate dielectric layer over a semiconductor substrate and in a PMOS region, forming a first metal-containing layer over the gate dielectric layer and in the PMOS region, performing a treatment on the first metal-containing layer in the PMOS region using an oxygen-containing process gas, and forming a second metal-containing layer over the first metal-containing layer and in the PMOS region. The second metal-containing layer has a work function lower than a mid-gap work function of silicon. The first metal-containing layer and the second metal-containing layer form a gate of the PMOS device.